MFRC522 RFID reader: specs and pinout
Contactless reader and writer IC for ISO/IEC 14443 A cards and tags (MIFARE, NTAG) with a host interface.
Specs
| Spec | Value | Source |
|---|---|---|
| Supply voltage (VDDA, VDDD, TVDD) | 2.5 V to 3.6 V (3.3 V typ); features list 2.5 V to 3.3 V | source Characteristics table (p.2); features (p.2) |
| PVDD supply voltage | 1.6 V to 3.6 V (1.8 V typ) | source Characteristics table (p.2) |
| Digital supply current IDDD | 6.5 mA typ, 9 mA max (VDDD = 3 V) | source Characteristics table (p.3) |
| Analog supply current IDDA | 7 mA typ, 10 mA max (VDDA = 3 V, receiver on) | source Characteristics table (p.3) |
| Power-down current Ipd | 5 uA max (hard power-down, NRSTPD low, all supplies) | source Characteristics table (p.3) |
| Typical operating distance | up to 50 mm (read/write mode, depends on antenna and supply) | source Features (p.2) |
| SPI interface speed | up to 10 Mbit/s | source Features (p.2); host interface (p.10) |
| UART speed | up to 1228.8 kBd | source Features (p.2) |
Power
| Value | Source | |
|---|---|---|
| Supply | 2.5-3.6 V (VDDA, VDDD, TVDD); PVDD 1.6-3.6 V | source Characteristics table (p.2-3) |
| Current | IDDA 7 mA typ (receiver on); IDDD 6.5 mA typ at VDDD = 3 V | source Characteristics table (p.2-3) |
Chip pins
These are the pins of the chip on the module, from the chip datasheet. The module's own header may label or expose them differently. Module header labels come from the Compoden listing, not an official module schematic.
| Pin | Function | Voltage | Notes | Source |
|---|---|---|---|---|
| AVDD / DVDD / TVDD | Analog, digital and transmitter power supplies | 2.5-3.6 V (3.3 V typ); features list gives 2.5-3.3 V; absolute max +4.0 V | 5 V on these supplies exceeds the 4.0 V absolute maximum. | source Section 7 Pinning information, Table 3 Pin description (p.6-7); Section 11 Table 150 Limiting values |
| PVDD | Pin power supply (host interface pins) | 1.6-3.6 V (1.8 V typ); absolute max +4.0 V | Sets the I/O level of the digital pins. | source Section 7 Pinning information, Table 3 Pin description (p.6-7); Section 11 Table 150 Limiting values |
| DVSS / AVSS / PVSS / TVSS | Digital, analog, pin-supply and transmitter grounds | 0 V | source Section 7 Pinning information, Table 3 Pin description (p.6-7) | |
| NRSTPD | Reset and power-down input | Digital pin absolute max VDD(PVDD) + 0.5 V; PVDD 1.6-3.6 V. Not specified as 5 V tolerant. | Low = power-down; a positive edge = reset. | source Section 7 Pinning information, Table 3 Pin description (p.6-7) |
| IRQ | Interrupt request output (pin 23) | Optional per the listing FAQ. | source Section 7 Pinning information, Table 3 Pin description (p.6-7) | |
| SDA / NSS / RX | SDA: I2C data; NSS: SPI chip-select input; RX: UART input (pin 24) | Digital pin absolute max VDD(PVDD) + 0.5 V; PVDD 1.6-3.6 V. Not specified as 5 V tolerant. | In SPI mode this pin is the chip select (NSS), not a data line. Module label 'SDA' is assumed to be this pin by name match. | source Section 7 Pinning information, Table 3 Pin description (p.6-7); Section 8.1 Digital interfaces |
| D5 / ADR_1 / SCK / DTRQ | SPI serial clock input when SPI is selected | Digital pin absolute max VDD(PVDD) + 0.5 V; PVDD 1.6-3.6 V. Not specified as 5 V tolerant. | source Section 7 Pinning information, Table 3 Pin description (p.6-7) | |
| D6 / ADR_0 / MOSI / MX | SPI master out, slave in (MOSI) when SPI is selected | Digital pin absolute max VDD(PVDD) + 0.5 V; PVDD 1.6-3.6 V. Not specified as 5 V tolerant. | source Section 7 Pinning information, Table 3 Pin description (p.6-7) | |
| D7 / SCL / MISO / TX | SPI master in, slave out (MISO) when SPI is selected | Digital pin absolute max VDD(PVDD) + 0.5 V; PVDD 1.6-3.6 V. Not specified as 5 V tolerant. | source Section 7 Pinning information, Table 3 Pin description (p.6-7) | |
| I2C and EA | Interface-select inputs (I2C-bus enable, external address) | Digital pin absolute max VDD(PVDD) + 0.5 V; PVDD 1.6-3.6 V. Not specified as 5 V tolerant. | Chip pins; the module header does not expose them per the listing. | source Section 7 Pinning information, Table 3 Pin description (p.6-7) |
Common mistakes
- Powering the chip from 5 V: the features list gives a 2.5-3.3 V supply and the table maximum is 3.6 V (source)
- Treating SDA as a data line in SPI mode: on this chip the SDA pin is the NSS (chip select) input when SPI is selected (source)
- Expecting reads beyond 50 mm: the typical operating distance is up to 50 mm in read/write mode (source)
What we could not confirm
- Digital input and output logic levels (VIH/VIL/VOH) are unclear in the datasheet copy; check the PDF for the exact levels.
- Card read range is not specified in the datasheet beyond the typical operating distance.
- The RC522 red module board is third-party; chip datasheet only.
- Datasheet absolute maximum on every input pin (except MFIN and RX) is VDD(PVDD) + 0.5 V, with PVDD at most 3.6 V. The listing's '3.3V (5V tolerant I/O)' claim is NOT supported by the datasheet and is unsafe to rely on; 5 V logic needs level shifting.
- Module label to chip pin mapping (SDA to NSS, SCK, MOSI, MISO) is by name only; the RC522 board is third-party and no official module schematic exists. The listing does not label RST; the chip's NRSTPD is its reset/power-down pin.
Sources
Building with the MFRC522 RFID reader? Describe your project on Soldr: it assigns pins from the board's published pinout, checks power and logic levels, and shows how to wire every part.