ESP32-DevKitC: specs and pinout
Espressif ESP32-DevKitC V4 development board with an ESP32-WROOM-32E module, Micro-USB port and USB-to-UART bridge.
Specs
| Spec | Value | Source |
|---|---|---|
| Module | ESP32-WROOM-32E | source Overview, key components (ESP32-WROOM-32E) |
| USB-to-UART bridge | Single USB-to-UART bridge chip, providing transfer rates up to 3 Mbps | source Key components, USB-to-UART Bridge |
| Processor (ESP32 chip in the module) | Dual-core, 2 cores at 240 MHz | source Features, CPU and Memory (CoreMark figures) |
| SRAM (ESP32 chip) | 520 KB SRAM | source Features, CPU and Memory |
| Wi-Fi (ESP32 chip) | 802.11 b/g/n | source Features, Wi-Fi |
| Bluetooth (ESP32 chip) | Bluetooth v4.2 BR/EDR and Bluetooth LE | source Features, Bluetooth |
Power
| Value | Source | |
|---|---|---|
| Supply | Micro USB port (default), or 5V and GND header pins, or 3V3 and GND header pins; use one and only one option | source Power Supply Options |
Pinout
| Pin | Function | Voltage | Notes | Source |
|---|---|---|---|---|
| 3V3 (J2-1) | 3.3 V power supply | 3.3 V | Guide pin type: P | source Header Block, table J2, pin 1 |
| EN (J2-2) | CHIP_PU, Reset | Guide pin type: I | source Header Block, table J2, pin 2 | |
| VP (J2-3) | GPIO36, ADC1_CH0, S_VP | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide table type is Input only (I); Guide pin type: I | source Header Block, table J2, pin 3 |
| VN (J2-4) | GPIO39, ADC1_CH3, S_VN | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide table type is Input only (I); Guide pin type: I | source Header Block, table J2, pin 4 |
| IO34 (J2-5) | GPIO34, ADC1_CH6, VDET_1 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide table type is Input only (I); Guide pin type: I | source Header Block, table J2, pin 5 |
| IO35 (J2-6) | GPIO35, ADC1_CH7, VDET_2 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide table type is Input only (I); Guide pin type: I | source Header Block, table J2, pin 6 |
| IO32 (J2-7) | GPIO32, ADC1_CH4, TOUCH_CH9, XTAL_32K_P | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J2, pin 7 |
| IO33 (J2-8) | GPIO33, ADC1_CH5, TOUCH_CH8, XTAL_32K_N | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J2, pin 8 |
| IO25 (J2-9) | GPIO25, ADC2_CH8, DAC_1 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J2, pin 9 |
| IO26 (J2-10) | GPIO26, ADC2_CH9, DAC_2 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J2, pin 10 |
| IO27 (J2-11) | GPIO27, ADC2_CH7, TOUCH_CH7 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J2, pin 11 |
| IO14 (J2-12) | GPIO14, ADC2_CH6, TOUCH_CH6, MTMS | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J2, pin 12 |
| IO12 (J2-13) | GPIO12, ADC2_CH5, TOUCH_CH5, MTDI | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Strapping pin (MTDI (GPIO12), ESP32 datasheet Table 3-1); Guide pin type: I/O | source Header Block, table J2, pin 13 |
| GND (J2-14) | Ground | Guide pin type: G | source Header Block, table J2, pin 14 | |
| IO13 (J2-15) | GPIO13, ADC2_CH4, TOUCH_CH4, MTCK | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J2, pin 15 |
| D2 (J2-16) | GPIO9, D2 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Used internally for the SPI flash (guide footnote 2): avoid using this pin; Guide pin type: I/O | source Header Block, table J2, pin 16 |
| D3 (J2-17) | GPIO10, D3 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Used internally for the SPI flash (guide footnote 2): avoid using this pin; Guide pin type: I/O | source Header Block, table J2, pin 17 |
| CMD (J2-18) | GPIO11, CMD | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Used internally for the SPI flash (guide footnote 2): avoid using this pin; Guide pin type: I/O | source Header Block, table J2, pin 18 |
| 5V (J2-19) | 5 V power supply | 5 V | Guide pin type: P | source Header Block, table J2, pin 19 |
| GND (J3-1) | Ground | Guide pin type: G | source Header Block, table J3, pin 1 | |
| IO23 (J3-2) | GPIO23 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J3, pin 2 |
| IO22 (J3-3) | GPIO22 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J3, pin 3 |
| TX (J3-4) | GPIO1, U0TXD | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J3, pin 4 |
| RX (J3-5) | GPIO3, U0RXD | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J3, pin 5 |
| IO21 (J3-6) | GPIO21 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J3, pin 6 |
| GND (J3-7) | Ground | Guide pin type: G | source Header Block, table J3, pin 7 | |
| IO19 (J3-8) | GPIO19 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J3, pin 8 |
| IO18 (J3-9) | GPIO18 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J3, pin 9 |
| IO5 (J3-10) | GPIO5 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Strapping pin (GPIO5, ESP32 datasheet Table 3-1); Guide pin type: I/O | source Header Block, table J3, pin 10 |
| IO17 (J3-11) | GPIO17 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide footnote 3: GPIO16/GPIO17 are usable only on boards with ESP32-WROOM / ESP32-SOLO-1 modules; reserved for internal use on ESP32-WROVER boards; Guide pin type: I/O | source Header Block, table J3, pin 11 |
| IO16 (J3-12) | GPIO16 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide footnote 3: GPIO16/GPIO17 are usable only on boards with ESP32-WROOM / ESP32-SOLO-1 modules; reserved for internal use on ESP32-WROVER boards; Guide pin type: I/O | source Header Block, table J3, pin 12 |
| IO4 (J3-13) | GPIO4, ADC2_CH0, TOUCH_CH0 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Guide pin type: I/O | source Header Block, table J3, pin 13 |
| IO0 (J3-14) | GPIO0, ADC2_CH1, TOUCH_CH1, Boot | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Strapping pin (GPIO0, ESP32 datasheet Table 3-1); Guide pin type: I/O | source Header Block, table J3, pin 14 |
| IO2 (J3-15) | GPIO2, ADC2_CH2, TOUCH_CH2 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Strapping pin (GPIO2, ESP32 datasheet Table 3-1); Guide pin type: I/O | source Header Block, table J3, pin 15 |
| IO15 (J3-16) | GPIO15, ADC2_CH3, TOUCH_CH3, MTDO | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Strapping pin (MTDO (GPIO15), ESP32 datasheet Table 3-1); Guide pin type: I/O | source Header Block, table J3, pin 16 |
| D1 (J3-17) | GPIO8, D1 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Used internally for the SPI flash (guide footnote 2): avoid using this pin; Guide pin type: I/O | source Header Block, table J3, pin 17 |
| D0 (J3-18) | GPIO7, D0 | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Used internally for the SPI flash (guide footnote 2): avoid using this pin; Guide pin type: I/O | source Header Block, table J3, pin 18 |
| CLK (J3-19) | GPIO6, CLK | 3.3 V logic (not 5 V tolerant: VIH max = VDD + 0.3 V per ESP32 datasheet Table 5-3) | Used internally for the SPI flash (guide footnote 2): avoid using this pin; Guide pin type: I/O | source Header Block, table J3, pin 19 |
Common mistakes
- Connecting more than one power option at once: the guide says the three options are mutually exclusive and only one may be used (source)
- Using D0, D1, D2, D3, CMD or CLK for your own signals: the guide says these pins are used internally for communication with the SPI flash (source)
- Feeding 5V into the ESP32 pins: the ESP32 chip operating voltage is 2.3 V to 3.6 V (source)
What we could not confirm
- Module is ESP32-WROOM-32E, whose datasheet is not in the local set. Module flash, module operating voltage and module ambient range are therefore not stated. The local WROOM-32 datasheet covers the non-E module and is not used for values.
- Chip variant: the listing's ESP32-D0WDQ6 is not named in the DevKitC V4 guide, so the listing value is not used.
- Micro-USB input voltage: the guide does not give a voltage figure.
- GPIO logic level and per-pin current are not stated in the guide or in the chip text read.
- Pin table is the Espressif ESP32-DevKitC V4 user guide (J2/J3). The listing board is a compatible clone: header order and silk labels were not checked against the clone.
- GPIO voltage rows cite the ESP32 chip datasheet DC characteristics (VIH max VDD + 0.3 V); the dev-kit guide itself does not state a pin voltage.
Sources
- Espressif ESP32-DevKitC V4 user guide (official): link.
- ESP32 chip datasheet (official): link, used for chip values only.
- Not used for values: the ESP32-WROOM-32 datasheet (link) covers the non-E module, and the DevKitC V4 schematic.
Building with the ESP32-DevKitC? Describe your project on Soldr: it assigns pins from the board's published pinout, checks power and logic levels, and shows how to wire every part.