CD4543 BCD to 7-segment decoder: specs and pinout
A CMOS BCD-to-seven-segment latch/decoder/driver for LCD displays that can also drive LEDs. It has a latch input, a blanking input and a phase input that selects common-cathode or common-anode LEDs or an LCD backplane signal.
Specs
| Spec | Value | Source |
|---|---|---|
| Supply voltage VDD | 3 V to 18 V recommended; absolute maximum -0.5 V to +20 V | source Recommended Operating Conditions, p.2; Maximum Ratings, p.1 |
| Input logic levels | VIH 3.5 V min and VIL 1.5 V max at VDD 5 V; 7 V and 3 V at 10 V | source Static Electrical Characteristics, p.3 |
| Output sink current | IOL 0.51 mA min (1 mA typ) at VO 0.4 V, VDD 5 V; 1.3 mA min at VDD 10 V, 25 C | source Static Electrical Characteristics, p.3 |
| Output source current | IOH -0.37 mA min (-0.75 mA typ) at VO 4.6 V, VDD 5 V; -0.8 mA min at VDD 10 V, 25 C | source Static Electrical Characteristics, p.3 |
| Quiescent current | 0.04 uA typ, 5 uA max at VDD 5 V, 25 C | source Static Electrical Characteristics, p.3 |
| Latch disable LD | LD high: outputs follow the BCD input; LD low: latches the last code | source Truth Table, p.5 |
| Blanking BI | BI high blanks all segments; codes 10 to 15 also display blank | source Truth Table, p.5 |
| Phase Ph | Ph = 0 for common-cathode LED readouts; Ph = 1 for common-anode; square wave for LCD readouts | source Truth Table and Description, p.1 and p.5 |
| Propagation delay | 600 ns typ (1200 ns max) high-to-low at VDD 5 V, 50 pF | source Dynamic Electrical Characteristics, p.4 |
| Operating temperature | -55 C to +125 C | source Maximum Ratings, p.1 |
Power
| Value | Source | |
|---|---|---|
| Supply | VDD 3-18 V | source Recommended Operating Conditions p.2; Static Electrical Characteristics p.3 |
| Current | 0.04 uA typ quiescent at VDD 5 V (display current not included) | source Recommended Operating Conditions p.2; Static Electrical Characteristics p.3 |
Pinout
This is a bare logic IC, not a module.
| Pin | Function | Voltage | Notes | Source |
|---|---|---|---|---|
| LATCH DISABLE (1) | Latch input | high = transparent, low = hold | source Terminal assignment p.1; Truth Table p.5 | |
| C (2), B (3), D (4), A (5) | BCD data inputs | VIH 3.5 V min at VDD 5 V | A is the least significant bit, D the most | source Terminal assignment p.1; Truth Table p.5 |
| PHASE (6) | Phase input | 0 common-cathode, 1 common-anode | source Terminal assignment p.1; Truth Table p.5 | |
| BLANKING (7) | Blanking input | high = blank | source Terminal assignment p.1; Truth Table p.5 | |
| VSS (8) | Ground | source Terminal assignment, p.1 | ||
| a (9), b (10), c (11), d (12), e (13), g (14), f (15) | Seven-segment outputs | Pin order as drawn on the terminal assignment diagram and Fig. 1 | source Terminal assignment p.1; Fig. 1 p.2 | |
| VDD (16) | Supply | 3-18 V | source Terminal assignment, p.1 |
Build with it
Project ideas for the CD4543 BCD to 7-segment decoder. Each link opens Soldr with the prompt filled in; Soldr assigns the pins, checks power and shows how to wire every part.
- BCD to segment tester: The Uno 5 V logic suits a VDD of 5 V; Ph is set to 0 for common-cathode style. Outputs are weak at 5 V (0.37-0.51 mA min), so use LEDs as dim indicators or add BC547 buffers.
- Push-button counter display: The counter's BCD outputs feed the decoder directly; both are CMOS on the same VDD. The CD4518 counts in BCD (0 to 9), and the decoder blanks codes 10 to 15. Use a common-cathode display with Ph set to 0, one series resistor per segment from the resistor pack, and the breadboard supply set to 5 V for both chips. Outputs are weak at 5 V, so the display will be dim. A push button into the counter may bounce and count twice.
- Segment driver with transistor buffers: A BC547 per segment (hFE 110 min) turns the decoder's sub-milliamp output into LED current; keep each segment well under the transistor's 100 mA limit. Use a common-cathode display with Ph set to 0; power the chips and display from the Uno 5 V pin, with series resistors from the resistor pack for the base of each BC547 and each segment.
Common mistakes
- Connecting 3.3 V logic to a 5 V CD4543: at VDD 5 V the input high level is 3.5 V minimum, so a 3.3 V output does not meet it (source)
- Expecting strong LED drive at 5 V: the outputs sink 0.51 mA min and source 0.37 mA min at VDD 5 V, so a bare LED segment will be dim; use higher VDD or buffer transistors (source)
- Wrong Ph setting: Ph must be 0 for common-cathode LED displays and 1 for common-anode; an LCD needs a square wave on Ph and the backplane (source)
Not covered by the official source
- The TI PDF is a scanned datasheet; values are from pages 1-5.
Sources
- link (TI/Harris CD4543B, SCHS086D, April 2004; maker)