CH9121 serial to Ethernet module: specs and pinout
A serial-to-Ethernet converter module built around the WCH CH9121 network serial port transparent transmission chip. All figures below are for the chip; the module board itself (power input, level shifting, connector order) is not covered by an official document.
Specs
| Spec | Value | Source |
|---|---|---|
| Network | 10/100M Ethernet (MAC and PHY built in), full or half duplex, auto MDI/MDIX | source Features, p.1 |
| Working modes | TCP CLIENT, TCP SERVER, UDP CLIENT, UDP SERVER | source Overview, p.1 |
| Serial ports | 2 independent UARTs, 300 bps to 10 Mbps | source Features, p.1-2 |
| Chip core supply (VCC33) | 3.2 V min, 3.3 V typ, 3.4 V max | source Table 7-2, p.10 |
| Chip I/O supply (VCCIO) | 1.7 V min, 3.3 V typ, 3.6 V max | source Table 7-2, p.10 |
| Absolute maximum | 4.0 V on VCC33 and VCCIO; input pin up to VCCIO + 0.4 V | source Table 7-1, p.10 |
| Supply current (chip incl. network transformer, 3.3 V) | 76.1 mA (100BASE-TX with data), 50.2 mA (10BASE-TX with data), 55 mA (not linked) | source Table 7-3, p.11 |
| Ambient temperature, operation | -40 to 85 C | source Table 7-1, p.10 |
Power
| Value | Source | |
|---|---|---|
| Supply | Chip: VCC33 3.2-3.4 V (3.3 V typ). Module input voltage: not covered by an official document. | source Table 7-3, p.11 |
| Current | 76.1 mA chip supply at 100BASE-TX with data (3.3 V, 25 C) | source Table 7-3, p.11 |
Chip pins
These are the pins of the chip on the module, from the chip datasheet. The module's own header may label or expose them differently.
These rows are the CH9121T chip pins (TSSOP20). The module's own header labels, order and power input are not covered by an official document; read them from the silkscreen.
| Pin | Function | Voltage | Notes | Source |
|---|---|---|---|---|
| 18 | VCC33 | 3.3 V | CH9121T chip pin: main power input | source Table 4-1, p.3 |
| 8 | VCCIO | 1.7-3.6 V | CH9121T chip pin: I/O interface power input | source Table 4-1, p.3 |
| 17 | GND | CH9121T chip pin: common ground | source Table 4-1, p.3 | |
| 13 | RXD1 | CH9121T chip pin: serial port 1 data input, pull-up | source Table 4-1, p.3 | |
| 14 | TXD1 | CH9121T chip pin: serial port 1 data output | source Table 4-1, p.3 | |
| 10 | RXD2 | CH9121T chip pin: serial port 2 data input, pull-up | source Table 4-1, p.3 | |
| 9 | TXD2 | CH9121T chip pin: serial port 2 data output | source Table 4-1, p.3 | |
| 11 | CFG | CH9121T chip pin: low level enters serial configuration mode; leave floating or high to exit | source Table 4-1, p.3 | |
| 6 | LINK/RESET | CH9121T chip pin: link LED output; low for 2 s at power-on restores factory settings | source Table 4-1, p.3 | |
| 7 | ACT | CH9121T chip pin: carrier-sense LED output | source Table 4-1, p.3 |
Build with it
Project ideas for the CH9121 serial to Ethernet module. Each link opens Soldr with the prompt filled in; Soldr assigns the pins, checks power and shows how to wire every part.
- Wired Ethernet temperature logger: The ESP32 UART is 3.3 V and the chip's own I/O supply range is 1.7 V to 3.6 V, but the module's serial level and supply input are not documented: read them from the module's silkscreen before wiring. Learning project. The DS18B20 data line needs a pull-up resistor from the resistor pack (value per the probe's page).
- Pico serial to network bridge: The Pico's UART pins are 3.3 V. The chip's I/O supply range is 1.7 V to 3.6 V, but the module's serial level and supply input are not documented: read them from the module's silkscreen before wiring.
- Ethernet serial console for an ESP32 board: Transparent transmission passes UART bytes to a TCP connection; set the port and mode with the vendor PC tool. As with the other ideas, the module's serial level is not documented: read it from the silkscreen before wiring a 3.3 V ESP32, and add a level converter if it is 5 V.
Common mistakes
- The chip's I/O pins tolerate only VCCIO + 0.4 V (absolute maximum 4.0 V on the supplies), so a 5 V microcontroller TX line needs a level converter unless the module is documented to have one (source: link, Table 7-1).
- The CFG pin held low selects serial configuration mode, so a wrongly pulled CFG pin changes how the chip behaves (source: link, Table 4-1 pin 11).
- The datasheet recommends CH9121T for new designs and lists CH9121A and an older non-suffix CH9121; check the chip marking on the module before following a pin table (source: link, Table 3-1 notes).
Not covered by the official source
- Module board (regulator, level shifting, header order, input voltage) is not covered by an official document.
- Which package/variant (CH9121T, CH9121A or the older CH9121) is fitted is not confirmed; the pin rows are for CH9121T.
- Table 7-1 labels the -40 to 85 C row 'ambient temperature during operation' inside the absolute maximum table.
Sources
- link (WCH CH9121 Datasheet V2.5, copy hosted by LCSC)