ATmega16A chip: specs and pinout
8-bit AVR microcontroller with 16 KB in-system programmable flash, 1 KB SRAM and 512 bytes EEPROM, 32 I/O lines. Bare chip; the listing does not say which package.
Specs
| Spec | Value | Source |
|---|---|---|
| Operating voltage | 2.7 V to 5.5 V | source Features, Operating Voltages |
| Speed grade | 0 to 16 MHz | source Features, Speed Grades |
| Operating temperature | -40 C to 85 C | source Electrical characteristics, DC Characteristics conditions (TA = -40C to 85C) |
| Flash / SRAM / EEPROM | 16 KB / 1 KB / 512 bytes | source Features, High Endurance Non-volatile Memory segments |
| Programmable I/O lines | 32 | source Features, I/O and Packages |
| Packages | 40-pin PDIP, 44-lead TQFP, 44-pad QFN/MLF | source Features, I/O and Packages |
| ADC | 8-channel 10-bit; 8 single-ended; 7 differential channels in TQFP package only | source Features, Peripheral Features |
| PWM channels | 4 | source Features, Peripheral Features |
| Active current | 0.6 mA at 1 MHz, 3 V, 25 C | source Features, Power Consumption |
| Power-down current | < 1 uA at 3 V, 25 C | source Features, Power Consumption |
Power
| Value | Source | |
|---|---|---|
| Supply | 2.7 V to 5.5 V | source Features, Operating Voltages and Power Consumption |
| Current | 0.6 mA active at 1 MHz, 3 V, 25 C; < 1 uA power-down | source Features, Operating Voltages and Power Consumption |
Pinout
Bare chip, no module board. The pin table is the 40-pin PDIP figure from the chip data sheet; the TQFP/QFN pin numbers are different. The listing does not state the package, so check the chip in hand against the figure.
| Pin | Function | Voltage | Notes | Source |
|---|---|---|---|---|
| 1 | PB0 (XCK/T0) | source Section 1 Figure 1-1, PDIP | ||
| 2 | PB1 (T1) | source Section 1 Figure 1-1, PDIP | ||
| 3 | PB2 (INT2/AIN0) | source Section 1 Figure 1-1, PDIP | ||
| 4 | PB3 (OC0/AIN1) | source Section 1 Figure 1-1, PDIP | ||
| 5 | PB4 (SS) | source Section 1 Figure 1-1, PDIP | ||
| 6 | PB5 (MOSI) | source Section 1 Figure 1-1, PDIP | ||
| 7 | PB6 (MISO) | source Section 1 Figure 1-1, PDIP | ||
| 8 | PB7 (SCK) | source Section 1 Figure 1-1, PDIP | ||
| 9 | RESET | source Section 1 Figure 1-1, PDIP | ||
| 10 | VCC | source Section 1 Figure 1-1, PDIP | ||
| 11 | GND | source Section 1 Figure 1-1, PDIP | ||
| 12 | XTAL2 | source Section 1 Figure 1-1, PDIP | ||
| 13 | XTAL1 | source Section 1 Figure 1-1, PDIP | ||
| 14 | PD0 (RXD) | source Section 1 Figure 1-1, PDIP | ||
| 15 | PD1 (TXD) | source Section 1 Figure 1-1, PDIP | ||
| 16 | PD2 (INT0) | source Section 1 Figure 1-1, PDIP | ||
| 17 | PD3 (INT1) | source Section 1 Figure 1-1, PDIP | ||
| 18 | PD4 (OC1B) | source Section 1 Figure 1-1, PDIP | ||
| 19 | PD5 (OC1A) | source Section 1 Figure 1-1, PDIP | ||
| 20 | PD6 (ICP1) | source Section 1 Figure 1-1, PDIP | ||
| 21 | PD7 (OC2) | source Section 1 Figure 1-1, PDIP | ||
| 22 | PC0 (SCL) | source Section 1 Figure 1-1, PDIP | ||
| 23 | PC1 (SDA) | source Section 1 Figure 1-1, PDIP | ||
| 24 | PC2 (TCK) | JTAG pin; the sheet lists a JTAG interface on port C | source Section 1 Figure 1-1, PDIP | |
| 25 | PC3 (TMS) | JTAG pin; the sheet lists a JTAG interface on port C | source Section 1 Figure 1-1, PDIP | |
| 26 | PC4 (TDO) | JTAG pin; the sheet lists a JTAG interface on port C | source Section 1 Figure 1-1, PDIP | |
| 27 | PC5 (TDI) | JTAG pin; the sheet lists a JTAG interface on port C | source Section 1 Figure 1-1, PDIP | |
| 28 | PC6 (TOSC1) | source Section 1 Figure 1-1, PDIP | ||
| 29 | PC7 (TOSC2) | source Section 1 Figure 1-1, PDIP | ||
| 30 | AVCC | source Section 1 Figure 1-1, PDIP | ||
| 31 | GND | source Section 1 Figure 1-1, PDIP | ||
| 32 | AREF | source Section 1 Figure 1-1, PDIP | ||
| 33 | PA7 (ADC7) | source Section 1 Figure 1-1, PDIP | ||
| 34 | PA6 (ADC6) | source Section 1 Figure 1-1, PDIP | ||
| 35 | PA5 (ADC5) | source Section 1 Figure 1-1, PDIP | ||
| 36 | PA4 (ADC4) | source Section 1 Figure 1-1, PDIP | ||
| 37 | PA3 (ADC3) | source Section 1 Figure 1-1, PDIP | ||
| 38 | PA2 (ADC2) | source Section 1 Figure 1-1, PDIP | ||
| 39 | PA1 (ADC1) | source Section 1 Figure 1-1, PDIP | ||
| 40 | PA0 (ADC0) | source Section 1 Figure 1-1, PDIP |
Build with it
Project ideas for the ATmega16A chip. Each link opens Soldr with the prompt filled in; Soldr assigns the pins, checks power and shows how to wire every part.
- A custom circuit board around an ATmega 16A that shows the temperature from a DS18B20 module on a TM1637 4-digit display: Digital I/O on ports B and D drives both modules; a 5 V supply sits inside the 2.7-5.5 V range. Programmed over its SPI pins.
- Light-following servo demo: Two ADC inputs on port A read the light modules and PD4/PD5 (OC1B/OC1A) give a hardware PWM output for the servo. Power the servo from its own 5 V supply and join the grounds. A learning project.
- Serial-controlled relay board: PD0 (RXD) and PD1 (TXD) are the chip's USART pins. Keep the relay on low-voltage loads such as an LED.
- Reaction-time game: Simple digital I/O and a timer are all it needs; the chip has two 8-bit timers and one 16-bit timer.
Common mistakes
- AVCC outside the allowed window: AVCC must stay within 2.7 to 5.5 V and within VCC - 0.3 V to VCC + 0.3 V (source: link, SPI serial programming figure note)
- Wiring the wrong package: the chip ships as 40-pin PDIP, 44-lead TQFP or 44-pad QFN/MLF, and the pin numbers differ (source: link, Features and Section 1 Figure 1-1)
- Treating port C pins PC2 to PC5 as free I/O: the JTAG interface (TCK, TMS, TDO, TDI) shares them (source: link, Features: JTAG interface; pinout Figure 1-1)
Not covered by the official source
- Package on the listing is not stated; the 40-pin PDIP table is given and the TQFP/QFN table in the same sheet differs.
- Speed grade voltage pairing is not stated separately in the Features list (listed as 0 to 16 MHz).
- Typical current at 16 MHz is not given on this page.
Sources
- link (Atmel-8154C ATmega16A datasheet, 07/2014)