CD4511 BCD to 7-segment decoder: specs and pinout
The CD4511B CMOS BCD-to-7-segment latch decoder driver, which turns a 4-bit BCD code into segment outputs that drive a common-cathode LED display directly (each segment still needs a series resistor). Bare 16-pin IC.
Specs
| Spec | Value | Source |
|---|---|---|
| Supply voltage | 3 V to 18 V operating; absolute maximum -0.5 V to +20 V (VDD) | source Operating Conditions and Maximum Ratings, p.1 |
| Segment output drive | Sources up to 25 mA per output | source Features, p.1 |
| Output power limit | 100 mW per output transistor; package 500 mW up to +100 C | source Maximum Ratings, p.1 |
| Input logic levels at VDD = 5 V | VIL max 1.5 V; VIH min 3.5 V | source Static Electrical Characteristics, p.2 |
| Input current | 1 uA max at 18 V over the full temperature range; 100 nA at 18 V and 25 C | source Features, p.1 |
| Display type | Drives common-cathode LED displays (and incandescent and low-voltage fluorescent displays) | source Applications, p.1 |
| Blanking of invalid codes | Seven-segment outputs blank for BCD input codes above 1001 | source Features, p.1 |
| Control inputs | Lamp Test (LT), Blanking (BL) and Latch Enable/Strobe (LE) | source Description, p.1 |
| Operating temperature | -55 C to +125 C | source Maximum Ratings, p.1 |
| Input setup time at VDD = 5 V | 150 ns min; hold 0 ns; strobe pulse width 400 ns min | source Operating Conditions, p.1 |
Power
| Value | Source | |
|---|---|---|
| Supply | 3 V to 18 V | source Operating Conditions, p.1 |
Chip pins
These are the pins of the chip on the module, from the chip datasheet. The module's own header may label or expose them differently.
Bare IC; pin numbers are for the 16-lead DIP/SOIC/TSSOP terminal assignment in the maker's sheet. LT and BL are active-low (barred names on the sheet).
| Pin | Function | Voltage | Notes | Source |
|---|---|---|---|---|
| 1 B | BCD input | source Terminal Assignment, p.1 | ||
| 2 C | BCD input | source Terminal Assignment, p.1 | ||
| 3 LT | Lamp test input (active low) | source Terminal Assignment, p.1 | ||
| 4 BL | Blanking input (active low) | source Terminal Assignment, p.1 | ||
| 5 LE/STROBE | Latch enable / strobe | source Terminal Assignment, p.1 | ||
| 6 D | BCD input | source Terminal Assignment, p.1 | ||
| 7 A | BCD input | source Terminal Assignment, p.1 | ||
| 8 VSS | Ground | 0 V | source Terminal Assignment, p.1 | |
| 9 e | Segment output | source Terminal Assignment, p.1 | ||
| 10 d | Segment output | source Terminal Assignment, p.1 | ||
| 11 c | Segment output | source Terminal Assignment, p.1 | ||
| 12 b | Segment output | source Terminal Assignment, p.1 | ||
| 13 a | Segment output | source Terminal Assignment, p.1 | ||
| 14 g | Segment output | source Terminal Assignment, p.1 | ||
| 15 f | Segment output | source Terminal Assignment, p.1 | ||
| 16 VDD | Positive supply | source Terminal Assignment, p.1 |
Build with it
Project ideas for the CD4511 BCD to 7-segment decoder. Each link opens Soldr with the prompt filled in; Soldr assigns the pins, checks power and shows how to wire every part.
- One-digit counter display: Four Uno pins send the BCD code. Use one series resistor per segment and a 5 V supply so the Uno's high level meets the 3.5 V input threshold. Learning project. Tie LT and BL to 5 V and LE to ground so the digit is displayed (truth table).
- Dice display: Same wiring as the counter, with one series resistor per segment; the decoder saves seven Uno pins versus driving the segments directly. Learning project. Tie LT and BL to 5 V and LE to ground so the digit is displayed (truth table).
- Binary-to-digit trainer: Each button pulls one BCD input high through the 5 V supply (use pull-down resistors) and the display shows the number; needs no microcontroller. Set the breadboard supply to 5 V so inputs meet the 3.5 V threshold. Learning project. Tie LT and BL to 5 V and LE to ground so the digit is displayed (truth table).
Common mistakes
- It is a common-cathode driver: with a common-anode display the segments will not light correctly (source: link, Applications).
- At VDD = 5 V the inputs need at least 3.5 V for a high, so a 3.3 V board output may not register; use a 5 V board such as the Uno (source: link, Static Electrical Characteristics).
- LT and BL are active-low and LE latches when high: tie LT and BL high and LE low, or the display shows all segments, blank or a stale digit; never leave CMOS inputs floating (source: link, truth table, p.4 of the PDF).
Not covered by the official source
- Output-voltage-versus-load graphs are not transcribed; the pin table and truth table (PDF p.4) are used.
Sources
- link (TI CD4511B data sheet SCHS072B, revised July 2003)